Synopsys Introduces PrimeYield for 100X Faster SoC Yield Analysis and Optimization
Breakthrough Technology Redefines Design Signoff by Leveraging Industry's Golden Timing Signoff and Machine Learning Technology to Accelerate Statistical Yield Analysis MOUNTAIN VIEW, California, June 13, 2019 /PRNewswire/ -- Highlights: * Patented full-chip-scale parametric design yield anal...
IC Compiler II with Advanced Fusion Technologies Delivers Optimal QoR and Reduces ECO Turnaround Time More Than 40% at Juniper Networks
Juniper Networks Achieves 14% Lower Power and 6% Smaller Area on Next-generation Networking Design MOUNTAIN VIEW, California, June 12, 2019 /PRNewswire/ -- Highlights: * Exceptional QoR delivered by IC Compiler II with Advanced Fusion technologies enables Juniper to meet aggressive PPA goals ...
Synopsys Fusion Design Platform First to be Certified by Samsung Foundry for 5LPE Process with EUV Technology
AI-enhanced, Cloud-ready Platform with Fusion Technology Accelerates Next Wave of Industry Innovation MOUNTAIN VIEW, California, June 11, 2019 /PRNewswire/ -- Highlights: * Samsung certified Synopsys Fusion Design Platform for 5LPE process technology using 64-bit Arm Cortex-A53 and Cortex-A5...
Synopsys Extends Leadership with Enhanced Verification Continuum Platform
New Native Tool Integrations Enable up to 5X Higher Verification Performance MOUNTAIN VIEW, California, June 6, 2019 /PRNewswire/ -- Highlights: * Smart Loading technology in Verdi, enabled by Unified Compile with VCS, delivers 5X faster design load and tracing * Unified constraint solver te...
Synopsys Announces Software-driven SoC Power Analysis Solution, Enabling 1000X Faster Time-to-Results
MOUNTAIN VIEW, California, June 3, 2019 /PRNewswire/ -- Highlights: * ZeBu Power Analyzer extends the ZeBu Server 4 emulation system with novel, multi-threaded power analysis engines supporting RTL and gate-level flows * Executes billion-cycle activity profiles on ZeBu Server 4 to quickly id...
Elektrobit and Synopsys Collaborate to Accelerate Automotive Electronic System Virtual Development
MOUNTAIN VIEW, California and ERLANGEN, Germany, May 30, 2019 /PRNewswire/ -- Highlights: * Collaboration enables faster deployment of virtual environments at tier 1 and OEM companies * Using Synopsys VDKs enabled Elektrobit to port its AUTOSAR operating system up to 12 months ahead of sili...
Synopsys' ARC EV6x Vision Processor IP Named Best Processor of the Year by the Embedded Vision Alliance
ASIL D Ready Vision Processor with Safety Enhancement Delivers Highest Level of Functional Safety for Automotive SoCs MOUNTAIN VIEW, California, May 27, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that itsDesignWare® ARC® EV6x Vision Processor IP with Safety Enhancement Pa...
Synopsys and Kudan Collaborate to Accelerate Development of Intelligent Computer Vision Processing SoCs
Combination of Synopsys' ARC EV6x Vision Processor IP and KudanSLAM Software Delivers Efficient and Accurate Machine Vision to AI, Automotive, and IoT Applications MOUNTAIN VIEW, California and BRISTOL, England, May 22, 2019 /PRNewswire/ -- Highlights: * KudanSLAM software algorithms optimize...
Synopsys and Arm Extend Collaboration to Fusion Compiler to Accelerate Implementation of Arm's Next-Generation Client and Infrastructure Cores
QuickStart Implementation Kits Enhanced to Enable Fusion Compiler to Speed Implementation and Improve PPA for Arm-based SoCs MOUNTAIN VIEW, California, May 14, 2019 /PRNewswire/ -- Highlights: * Collaboration benefits demonstrated with successful SoC tapeouts by early adopters of Arm's latest...
Synopsys Launches New VESA DSC IP for Visually Lossless Compression in Mobile, AR-VR, and Automotive SoCs
VESA DSC IP Interoperates with DesignWare HDMI 2.1, DisplayPort, and MIPI DSI IP to Minimize Integration Risk and Accelerate Time-to-Market MOUNTAIN VIEW, California, May 9, 2019 /PRNewswire/ -- Highlights: * DesignWare VESA DSC IP is compliant with the VESA DSC 1.1 and 1.2a standards, delive...
Fudan Microelectronics Group Selects Synopsys' DesignWare Bluetooth IP for Smart IoT System-on-Chips
Silicon-Proven, Compliant Bluetooth 5.0 IP Delivers Low Power and Small Area in Popular 40-nm IoT Process MOUNTAIN VIEW, California, May 8, 2019 /PRNewswire/ -- Highlights: * Fudan Microelectronics Group selects Synopsys' DesignWare Bluetooth Controller andPHY IP to deliver ultra-low-power MC...
Synopsys Design Platform Certified for TSMC's Innovative SoIC Chip Stacking Technology
Close Collaboration Delivers Design Solutions for True 3D Device Integration MOUNTAIN VIEW, Calif., May 7, 2019 /PRNewswire/ -- Highlights: * Efficient support for the new chip stacking technology ensures realization of highest-performing 3D-IC solutions * Solution includes multi-die layout ...
Synopsys Announces Industry's First DDR5 NVDIMM-P Verification IP for Next-generation Storage-class Memory Designs
Native SystemVerilog VIP Features Built-in Coverage, Verification Planning, Memory-aware Debug, and Performance Analysis MOUNTAIN VIEW, California, May 7, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first verification IP (VIP) for Non-Vol...
Synopsys Achieves More Than 250 Design Wins with DesignWare IP on TSMC 7nm FinFET Process
Proven Interface, Analog, and Foundation IP Has Enabled Customer Silicon Successes Across a Range of Applications MOUNTAIN VIEW, Calif., May 6, 2019 /PRNewswire/ -- Highlights: * Silicon-proven DesignWare PHY IP on TSMC's 7nm FinFET process includes USB, DDR, LPDDR, HBM, PCI Express, MIPI, Di...
Synopsys Establishes Center of Excellence with STMicroelectronics to Speed Development of Automotive Electronic Systems
New Virtualizer Development Kit for ST Stellar Multicore MCU Deployed at Lead Automotive Tier 1 Companies Enabled Early Software Development MOUNTAIN VIEW, California, April 22, 2019 /PRNewswire/ -- Highlights: * VDKs enable software development before hardware availability and accelerate sys...
Latest Release of Synopsys' Design Compiler NXT is Ready for Broad Availability
Early Adopters Realizing Up to 2X Faster Runtime, 10% Improved QoR, and Tight Correlation to IC Compiler II MOUNTAIN VIEW, California, April 9, 2019 /PRNewswire/ -- Highlights: * Synopsys Design Compiler NXT incorporates innovative and efficient optimization engines delivering faster runtim...
Synopsys Introduces New embARC Machine Learning Inference Software Library for Power-Efficient Neural Networks
MOUNTAIN VIEW, Calif., April 8, 2019 /PRNewswire/ -- Highlights: * New embARC Machine Learning Inference (MLI) software library is optimized for low-power IoT applications that utilize convolutional neural networks (CNN) and recurrent neural networks (RNN) * The library supports the energy-e...
Synopsys and Palma Ceia SemiDesign Collaborate to Develop a Complete Hardware/Software NB-IoT IP Solution
Combination of Synopsys' ARC EM Processor with Palma Ceia's Silicon-Proven RF Transceiver Facilitates LTE Cat NB2 SoC Implementations MOUNTAIN VIEW, California and SANTA CLARA, California, April 3, 2019 /PRNewswire/ -- Highlights: * Efficient NB-IoT modem solution incorporates ultra-low power...
Synopsys Unveils TestMAX Family of Products to Address Critical and Evolving Test Challenges
Redefines Expectations for Test, with Innovations in Early-RTL Test Integration, Automotive Functional Safety, and High-Bandwidth Test MOUNTAIN VIEW, California, April 3, 2019 /PRNewswire/ -- Highlights: * Full RTL DFT flow, combined with Synopsys' Fusion Design Platform™, ensures fastest ti...
Synopsys' New Enhanced Security Package for ARC HS Processors Protects Embedded Systems Against Evolving Threats
Enables Development of Isolated, Secure Environments for High-Performance Applications MOUNTAIN VIEW, California, April 2, 2019 /PRNewswire/ -- Highlights: * New Enhanced Security Package option for ARC HS3x and HS4x processors enables development of secure environments in high-performance ...
