NASDAQ:SNPS

Faraday Adopts Synopsys SpyGlass Design Handoff Kit to Ensure High Design Quality

New Kit Provides Infrastructure for Checking, Reporting, and Packaging of ASIC Designs MOUNTAIN VIEW, California, July 1, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that Faraday Technology Corporation, a leading fabless ASIC and IP provider, has adopted Synopsys' SpyGlass...

2019-07-01 08:00 1329

Synopsys and GLOBALFOUNDRIES Collaborate to Develop Broad Portfolio of DesignWare IP for 12LP FinFET Process

High-quality DesignWare Interface and Analog IP Optimized for High Performance and Low Power in AI, Cloud Computing, and Mobile SoCs MOUNTAIN VIEW, California, June 27, 2019 /PRNewswire/ -- Highlights: * DesignWare IP portfolio for GLOBALFOUNDRIES 12LP FinFET process includes Multi-Protocol 2...

2019-06-27 08:00 1176

Synopsys Achieves ISO 9001 Certification for IP Quality Management System

MOUNTAIN VIEW, California, June 26, 2019 /PRNewswire/ -- Highlights: * Synopsys' IP Quality Management System (QMS) meets all required implementations, documentations, and procedures for ISO 9001:2015 certification, ensuring continued quality of its IP development processes * Certification a...

2019-06-26 08:00 1508

Synopsys Delivers 100X Faster Formal Verification Closure for AI, Graphics, and Processor Designs

VC Formal Datapath Validation Application Enables Broad Market Adoption of HECTOR Technology MOUNTAIN VIEW, California, June 25, 2019 /PRNewswire/ -- Highlights: * VC Formal Datapath Validation application delivers over 100X speed-up in formal verification between a reference C/C++ algorithm ...

2019-06-25 08:00 1383

Synopsys and Arm Collaborate to Enable Tapeouts by Early Adopters of Arm's Latest Premium Mobile Processors

Synopsys Design and Verification Platforms and DesignWare Interface IP Enable Optimized PPA and Faster Time-to-Market for Smartphones, Laptops, and Other Mobile Devices MOUNTAIN VIEW, California, June 24, 2019 /PRNewswire/ -- Highlights: * Synopsys' Fusion Design Platform enables faster imple...

2019-06-24 08:00 1144

Synopsys Design and Verification Solutions Enable Astera Labs to Develop Industry's First PCIe 5.0 Retimer SoC

Industry's First Full-chip Implementation and Verification Completed Entirely on Amazon Web Services Cloud MOUNTAIN VIEW, California, June 18, 2019 /PRNewswire/ -- Synopsys, Inc.  (Nasdaq: SNPS) today announced that Astera Labs successfully utilized Synopsys' Fusion Design Platform™, Verification...

2019-06-18 08:00 1741

Synopsys Introduces PrimeYield for 100X Faster SoC Yield Analysis and Optimization

Breakthrough Technology Redefines Design Signoff by Leveraging Industry's Golden Timing Signoff and Machine Learning Technology to Accelerate Statistical Yield Analysis MOUNTAIN VIEW, California, June 13, 2019 /PRNewswire/ -- Highlights: * Patented full-chip-scale parametric design yield anal...

2019-06-13 08:00 1433

IC Compiler II with Advanced Fusion Technologies Delivers Optimal QoR and Reduces ECO Turnaround Time More Than 40% at Juniper Networks

Juniper Networks Achieves 14% Lower Power and 6% Smaller Area on Next-generation Networking Design MOUNTAIN VIEW, California, June 12, 2019 /PRNewswire/ -- Highlights: * Exceptional QoR delivered by IC Compiler II with Advanced Fusion technologies enables Juniper to meet aggressive PPA goals ...

2019-06-12 08:00 2048

Synopsys Fusion Design Platform First to be Certified by Samsung Foundry for 5LPE Process with EUV Technology

AI-enhanced, Cloud-ready Platform with Fusion Technology Accelerates Next Wave of Industry Innovation MOUNTAIN VIEW, California, June 11, 2019 /PRNewswire/ --  Highlights: * Samsung certified Synopsys Fusion Design Platform for 5LPE process technology using 64-bit Arm Cortex-A53 and Cortex-A5...

2019-06-11 08:00 1393

Synopsys Extends Leadership with Enhanced Verification Continuum Platform

New Native Tool Integrations Enable up to 5X Higher Verification Performance MOUNTAIN VIEW, California, June 6, 2019 /PRNewswire/ -- Highlights: * Smart Loading technology in Verdi, enabled by Unified Compile with VCS, delivers 5X faster design load and tracing * Unified constraint solver te...

2019-06-06 08:00 1697

Synopsys Announces Software-driven SoC Power Analysis Solution, Enabling 1000X Faster Time-to-Results

MOUNTAIN VIEW, California, June 3, 2019 /PRNewswire/ -- Highlights: * ZeBu Power Analyzer extends the ZeBu Server 4 emulation system with novel, multi-threaded power analysis engines supporting RTL and gate-level flows * Executes billion-cycle activity profiles on ZeBu Server 4 to quickly id...

2019-06-03 08:00 1654

Elektrobit and Synopsys Collaborate to Accelerate Automotive Electronic System Virtual Development

MOUNTAIN VIEW, California and ERLANGEN, Germany, May 30, 2019 /PRNewswire/ -- Highlights: * Collaboration enables faster deployment of virtual environments at tier 1 and OEM companies * Using Synopsys VDKs enabled Elektrobit to port its AUTOSAR operating system up to 12 months ahead of sili...

2019-05-30 08:00 1512

Synopsys' ARC EV6x Vision Processor IP Named Best Processor of the Year by the Embedded Vision Alliance

ASIL D Ready Vision Processor with Safety Enhancement Delivers Highest Level of Functional Safety for Automotive SoCs MOUNTAIN VIEW, California, May 27, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced that itsDesignWare® ARC® EV6x Vision Processor IP with Safety Enhancement Pa...

2019-05-27 08:00 1756

Synopsys and Kudan Collaborate to Accelerate Development of Intelligent Computer Vision Processing SoCs

Combination of Synopsys' ARC EV6x Vision Processor IP and KudanSLAM Software Delivers Efficient and Accurate Machine Vision to AI, Automotive, and IoT Applications MOUNTAIN VIEW, California and BRISTOL, England, May 22, 2019 /PRNewswire/ -- Highlights: * KudanSLAM software algorithms optimize...

2019-05-22 08:00 1547

Synopsys and Arm Extend Collaboration to Fusion Compiler to Accelerate Implementation of Arm's Next-Generation Client and Infrastructure Cores

QuickStart Implementation Kits Enhanced to Enable Fusion Compiler to Speed Implementation and Improve PPA for Arm-based SoCs MOUNTAIN VIEW, California, May 14, 2019 /PRNewswire/ -- Highlights: * Collaboration benefits demonstrated with successful SoC tapeouts by early adopters of Arm's latest...

2019-05-14 08:00 2350

Synopsys Launches New VESA DSC IP for Visually Lossless Compression in Mobile, AR-VR, and Automotive SoCs

VESA DSC IP Interoperates with DesignWare HDMI 2.1, DisplayPort, and MIPI DSI IP to Minimize Integration Risk and Accelerate Time-to-Market MOUNTAIN VIEW, California, May 9, 2019 /PRNewswire/ -- Highlights: * DesignWare VESA DSC IP is compliant with the VESA DSC 1.1 and 1.2a standards, delive...

2019-05-09 08:00 807

Fudan Microelectronics Group Selects Synopsys' DesignWare Bluetooth IP for Smart IoT System-on-Chips

Silicon-Proven, Compliant Bluetooth 5.0 IP Delivers Low Power and Small Area in Popular 40-nm IoT Process MOUNTAIN VIEW, California, May 8, 2019 /PRNewswire/ -- Highlights: * Fudan Microelectronics Group selects Synopsys' DesignWare Bluetooth Controller andPHY IP to deliver ultra-low-power MC...

2019-05-08 08:00 657

Synopsys Design Platform Certified for TSMC's Innovative SoIC Chip Stacking Technology

Close Collaboration Delivers Design Solutions for True 3D Device Integration MOUNTAIN VIEW, Calif., May 7, 2019 /PRNewswire/ -- Highlights: * Efficient support for the new chip stacking technology ensures realization of highest-performing 3D-IC solutions * Solution includes multi-die layout ...

2019-05-07 08:00 660

Synopsys Announces Industry's First DDR5 NVDIMM-P Verification IP for Next-generation Storage-class Memory Designs

Native SystemVerilog VIP Features Built-in Coverage, Verification Planning, Memory-aware Debug, and Performance Analysis MOUNTAIN VIEW, California, May 7, 2019 /PRNewswire/ -- Synopsys, Inc. (Nasdaq: SNPS) today announced the availability of the industry's first verification IP (VIP) for Non-Vol...

2019-05-07 02:40 640

Synopsys Achieves More Than 250 Design Wins with DesignWare IP on TSMC 7nm FinFET Process

Proven Interface, Analog, and Foundation IP Has Enabled Customer Silicon Successes Across a Range of Applications MOUNTAIN VIEW, Calif., May 6, 2019 /PRNewswire/ -- Highlights: * Silicon-proven DesignWare PHY IP on TSMC's 7nm FinFET process includes USB, DDR, LPDDR, HBM, PCI Express, MIPI, Di...

2019-05-06 08:00 609
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