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Synopsys and Palma Ceia SemiDesign Collaborate to Develop a Complete Hardware/Software NB-IoT IP Solution

Synopsys, Inc.
2019-04-03 08:00 749

Combination of Synopsys' ARC EM Processor with Palma Ceia's Silicon-Proven RF Transceiver Facilitates LTE Cat NB2 SoC Implementations

MOUNTAIN VIEW, California and SANTA CLARA, California, April 3, 2019 /PRNewswire/ --

Highlights:

  • Efficient NB-IoT modem solution incorporates ultra-low power Synopsys DesignWare ARC EM9D Processor IP and NB-IoT reference baseband and protocol stacks, providing a software-defined modem that quickly adapts to continuously evolving standards
  • Palma Ceia's LTE Cat NB1/NB2 Rel. 14 RF transceiver is silicon-proven in 40-nm process and supports all possible high-band and low-band frequencies for NB-IoT

Synopsys, Inc. (Nasdaq: SNPS) and Palma Ceia SemiDesign (Palma Ceia) today announced that the two companies have integrated Palma Ceia's LTE Cat NB1/NB2 RF transceiver IP with Synopsys' DesignWare® ARC® EM9D Processor IP to deliver a complete low-power NB-IoT IP solution for both standalone or embedded modems. The collaboration provides designers with a ready-to-use NB-IoT solution, conforming to the latest LTE Release 14 standard.

"NB-IoT is enabling the next wave of IoT connected devices that require lower energy consumption and higher system capacity," said Kevin Walsh, vice president of strategic marketing at Palma Ceia. "By collaborating with Synopsys to deliver a complete, integrated NB-IoT solution consisting of our RF IP in Synopsys' NB-IoT platform, we are enabling the design community to accelerate the integration of NB-IoT into their SoCs with less risk."

DesignWare ARC EM9D Processor

The NB-IoT modem solution includes the ultra-low power ARC EM9D processor, which combines RISC and DSP capabilities for a flexible architecture that can be quickly adapted for rapidly changing wireless standards. The EM9D's zero-latency XY memory architecture takes advantage of instruction level parallelism and single-cycle 16+16 MAC operations to deliver power-efficient data processing. The ARC EM9D processor is supported by the MetaWare Toolkit, which includes a rich library of DSP functions, allowing software engineers to rapidly implement algorithms from standard DSP building blocks.

Palma Ceia SemiDesign LTE Release 14-Compliant RF Transceiver

The Palma Ceia LTE Cat NB1/NB2 Release 14 RF transceiver performs across all possible frequency bands for NB-IoT, including high band (1695 MHz to 2200 MHz) and low band (699 MHz to 960 MHz). The wide range of operation supports any band required for regions controlled by different network operators. Palma Ceia's RF transceiver IP is fully characterized in 40-nm processes.

"Wireless standards are evolving rapidly, driving the need for complete solutions to meet current LTE requirements while adapting to future 5G standards," said John Koeter, vice president of marketing for IP at Synopsys. "The combination of our ARC EM9D processor with Palma Ceia's RF transceiver will enable designers to implement a complete, low-power NB-IoT solution, accelerating time to market and reducing cost and risk."

Availability and Resources

  • Synopsys' DesignWare ARC EM9D processor is available now from Synopsys
  • PCS's LTE Cat NB1/NB2 Release 14 RF transceiver is available now from Palma Ceia SemiDesign

About Palma Ceia SemiDesign

Palma Ceia SemiDesign, Inc. is a provider of communication IP and chips for next-generation WiFi and cellular applications. With a focus on emerging WiFi and LTE standards, Palma Ceia supports the design of high-performance devices for broadband, wireless, medical and automotive applications. Palma Ceia solutions are differentiated by low-power, high-performance designs and ease of integration. With headquarters in Santa Clara, Calif., the company has design operations in McKinney, Texas, and sales and support activities in mainland China, Israel, Japan, Korea, and Taiwan. Visit Palma Ceia SemiDesign on the web at https://www.pcsemi.com.

Palma Ceia SemiDesign and the Palma Ceia SemiDesign logo are trademarks of Palma Ceia SemiDesign, Inc., and are protected by trademark laws.

About DesignWare IP

Synopsys is a leading provider of high-quality, silicon-proven IP solutions for SoC designs. The broad DesignWare IP portfolio includes logic libraries, embedded memories, embedded test, analog IP, wired and wireless interface IP, security IP, embedded processors, and subsystems. To accelerate prototyping, software development and integration of IP into SoCs, Synopsys' IP Accelerated initiative offers IP prototyping kits, IP software development kits and IP subsystems. Synopsys' extensive investment in IP quality, comprehensive technical support and robust IP development methodology enables designers to reduce integration risk and accelerate time-to-market. For more information on DesignWare IP, visit https://www.synopsys.com/designware.

About Synopsys

Synopsys, Inc. (Nasdaq: SNPS) is the Silicon to Software partner for innovative companies developing the electronic products and software applications we rely on every day. As the world's 15th largest software company, Synopsys has a long history of being a global leader in electronic design automation (EDA) and semiconductor IP and is also growing its leadership in software security and quality solutions. Whether you're a system-on-chip (SoC) designer creating advanced semiconductors, or a software developer writing applications that require the highest security and quality, Synopsys has the solutions needed to deliver innovative, high-quality, secure products. Learn more at www.synopsys.com.

Editorial Contacts:
Teresa Zhang
Synopsys, Inc.
yingxue@synopsys.com

Palma Ceia SemiDesign
press@pcsemi.com

 

Source: Synopsys, Inc.
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